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Verifying clock domain crossings when using fast-to-slow clocks
Checking that asynchronous signals cross clock domains correctly means identifying the data and control paths, and ensuring that the receive clock domain data flow is controlled by a multiplexer with a...
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Technology trends demand netlist-level CDC verification
Multiple asynchronous clocks are a fact of life on today’s SoC. Individual blocks have to run at different speeds so they can handle different functional and power payloads efficiently, and the ability...
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Get CDC protocols right with an automated formal-to-simulation flow
Today’s designs are often replete with asynchronous clocks. The signals crossing between these clock domains are prone to functional errors such as metastable events, corrupted data, and lost data....
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Fly the friendly skies with automated CDC verification for DO-254
With the number of independent clock domains found on today’s highly integrated and concurrent designs is growing. According to a 2018 Wilson Research study, 89 percent of all IC/ASIC designs and 90...
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